Many conventional electronic devices include platform designs that have a memory module placed on a board along with a silicon-on-chip electronic package. There are usually physical connections between the silicon-on-chip electronic package and the memory module through printed circuit board (e.g., a motherboard) routing within a printed circuit board. There is also typically physical connections between the silicon-on-chip electronic package and the memory module to other electronic components that are mounted on the platform.
The electronic routing between the silicon-on-chip electronic package and the memory module is extremely sensitive and requires proper isolation between signals that are located within the printed circuit board (i.e., the design must usually meet signal integrity specifications and printed circuit board design rules). The typical design usually requires multiple layers as well as relatively large amounts of real estate on the printed circuit board. Often times, the electronic routing between the silicon-on-chip electronic package and the memory module determines the layer count as well as the overall size of the printed circuit board.
In some conventional electronic devices, the size of the printed circuit board may be so large that battery capacity is often compromised. There is typically a design tradeoff with the size of the battery due to the size requirement of the printed circuit board in order to meet signal integrity specifications as well as printed circuit board design rules. This tradeoff in battery capacity occurs because the size of the battery must be reduced in order to accommodate the relatively large printed circuit board.